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双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVC1G74GD

Single D-type flip-flop with set and reset; positive edge trigger

The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

此产品已停产

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power consumption

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号 Package name
74LVC1G74GD XSON8

文档 (6)

文件名称 标题 类型 日期
74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Data sheet 2024-08-09
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11009 Pin FMEA for LVC family Application note 2019-01-09
lvc1g74 74LVC1G74 IBIS model IBIS model 2014-10-20
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT996-2 plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 3 mm x 2 mm x 0.5 mm body Package information 2020-04-21

支持

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模型

文件名称 标题 类型 日期
lvc1g74 74LVC1G74 IBIS model IBIS model 2014-10-20

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.