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    双极性晶体管

    二极管

    ESD保护、TVS、滤波和信号调节ESD保护

    MOSFET

    氮化镓场效应晶体管(GaN FET)

    绝缘栅双极晶体管(IGBTs)

    模拟和逻辑IC

    汽车应用认证产品(AEC-Q100/Q101)

    74AVCH16244DGG

    16-bit buffer/line driver; 3.6 V tolerant; 3-state

    The 74AVCH16244 is a 16-bit non-inverting buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3‑state outputs are controlled by the output enable inputs nOE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state.

    The 74AVCH16244 is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

    To ensure the high-impedance output state during power-up or power-down, nOE should be tied to VCC through a pull-up resistor (Live Insertion).

    A dynamic controlled output (DCO) circuitry is implemented to support termination line drive during transient.

    The 74AVCH16244 has active bus-hold circuitry to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

    此产品已停产

    Features and benefits

    • Wide supply voltage range from 1.2 V to 3.6 V

    • CMOS low power consumption

    • Low inductance multiple VCC and GND pins for minimum noise and ground bounce

    • Input/output tolerant up to 3.6 V

    • Dynamic controlled output (DCO) circuit dynamically changes the output impedance, resulting in noise reduction without speed degradation

    • Bus hold on all data inputs

    • Supports Live Insertion

    • Complies with JEDEC standards:

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8-1A (2.7 V to 3.6 V)

    Applications

    参数类型

    型号 Package name
    74AVCH16244DGG TSSOP48

    PCB Symbol, Footprint and 3D Model

    Model Name 描述

    封装

    下表中的所有产品型号均已停产 。

    型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
    74AVCH16244DGG 74AVCH16244DGG,112
    (935266778112)    		 Obsolete AVCH16244 Standard Procedure Standard Procedure SOT362-1
    TSSOP48
    (SOT362-1)     		SOT362-1 SSOP-TSSOP-VSO-WAVE
    		暂无信息
    74AVCH16244DGG,118
    (935266778118)    		 Obsolete AVCH16244 Standard Procedure Standard Procedure SOT362-1_118
    74AVCH16244DGG,512
    (935266778512)    		 Obsolete AVCH16244 Standard Procedure Standard Procedure 暂无信息
    74AVCH16244DGG,518
    (935266778518)    		 Obsolete AVCH16244 Standard Procedure Standard Procedure 暂无信息

    环境信息

    下表中的所有产品型号均已停产 。

    型号 可订购的器件编号 化学成分 RoHS RHF指示符
    74AVCH16244DGG 74AVCH16244DGG,112 74AVCH16244DGG rohs rhf rhf
    74AVCH16244DGG 74AVCH16244DGG,118 74AVCH16244DGG rohs rhf rhf
    74AVCH16244DGG 74AVCH16244DGG,512 74AVCH16244DGG rohs rhf rhf
    74AVCH16244DGG 74AVCH16244DGG,518 74AVCH16244DGG rohs rhf rhf
    品质及可靠性免责声明

    文档 (7)

    文件名称 标题 类型 日期
    74AVCH16244 16-bit buffer/line driver; 3.6 V tolerant; 3-state Data sheet 2018-02-20
    AN90007 Pin FMEA for AVC family Application note 2018-11-30
    SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22
    Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
    TSSOP48_SOT362-1_mk plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body Marcom graphics 2017-01-28
    SOT362-1 plastic thin shrink small outline package; 48 leads; body width 6.1 mm Package information 2024-01-05
    SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

    支持

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    模型

    文件名称 标题 类型 日期
    SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22

    PCB Symbol, Footprint and 3D Model

    Model Name 描述

    How does it work?

    The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.