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74ALVCH16652

16-bit transceiver/register with dual enable; 3-state

The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers.

Data on the ‘A’ or ‘B’, or both buses, will be stored in the internal registers, at the appropriate clock inputs (nCPAB or nCPBA) regardless of the select inputs (nSAB and nSBA) or output enable (nOEAB and nOEBA) control inputs.

Depending on the select inputs nSAB and nSBA data can directly go from input to output (real-time mode) or data can be controlled by the clock (storage mode), when OE inputs permit this operating mode.

The output enable inputs nOEAB and nOEBA determine the operation mode of the transceiver. When nOEAB is LOW, no data transmission from nBn to nAn is possible and when nOEBA is HIGH, no data transmission from nBn to nAn is possible.

When nSAB and nSBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling nOEAB and nOEBA. In this configuration each output reinforces its input.

Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

特性

  • Wide supply voltage range of 1.2 V to 3.6 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • Current drive ±24 mA at VCC = 3.0 V.

  • MULTIBYTE flow-through standard pin-out architecture

  • Low inductance multiple VCC and GND pins for minimum noise and ground bounce

  • All data inputs have bushold

  • Output drive capability 50 Ω transmission lines at 85 °C

  • Complies with JEDEC standards:

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8B/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V

    • CDM JESD22-C101E exceeds 1000 V

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsfmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Package name
74ALVCH16652DGGProductionn.a.n.a.TTL± 242.616150low-40~8593TSSOP56

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVCH16652DGG
TSSOP56
(SOT364-1) 		SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_118ActiveALVCH1665274ALVCH16652DGG,11
( 9352 627 99118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVCH16652DGG
TSSOP56
(SOT364-1) 		SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_518Discontinued / End-of-lifeALVCH1665274ALVCH16652DGGY
( 9352 627 99518 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74ALVCH16652DGG935262799518
74ALVCH16652DGG9352627995122021-12-312022-06-3074ALVCH16652DGG
    74ALVCH16652DGG935262799112

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVCH16652DGG74ALVCH16652DGG,1174ALVCH16652DGGweek 2, 2006

    下表中的版本已停产。参见表 停产信息 了解更多信息。

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVCH16652DGG74ALVCH16652DGGY74ALVCH16652DGGAlways Pb-free
    品质及可靠性免责声明

    文档 (5)

    文件名称标题类型日期
    74ALVCH1665216-bit transceiver/register with dual enable; 3-stateData sheet2018-09-12
    alvch16652alvch16652 IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT364-1plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm bodyPackage information2022-06-23

    支持

    如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

    模型

    文件名称标题类型日期
    alvch16652alvch16652 IBIS modelIBIS model2013-04-07

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