NG体育娱乐,ng体育平台

×

74ALVT16823

18-bit bus-interface D-type flip-flop with reset and enable; 3-state

The 74ALVT16823 is an 18-bit positive-edge triggered D-type flip-flop with 3-state outputs, reset and enable.

The device can be used as two 9-bit flip-flops or one 18-bit flip-flop. The device features clock (nCP), clock enable (nCE), master reset (nMR) and output enable (nOE, inputs each controlling 9-bits. When nCE is LOW, the flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops. A LOW on nMR will reset the flip-flops LOW. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

特性

  • Wide supply voltage range from 2.3 V to 3.6 V

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Direct interface with TTL levels

  • Bus hold on data inputs

  • Power-up 3-state

  • IOFF circuitry provides partial Power-down mode operation

  • Two sets of high speed parallel registers with positive edge-triggered D-type flip-flops

  • Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors

  • Live insertion and extraction permitted

  • Power-up reset

  • No bus current loading when output is tied to 5 V bus

  • Output capability: +64 mA to -32 mA

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • ESD protection:

    • MIL STD 883, method 3015: exceeds 2000 V

    • MM: exceeds 200 V

  • Specified from -40 °C to 85 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Package name
74ALVT16823DGGProduction2.3 - 3.6TTL-32/+641.9250medium-40~859321.0TSSOP56

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74ALVT16823DGG
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_118ActiveALVT1682374ALVT16823DGG,118
( 9352 610 19118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74ALVT16823DGG
TSSOP56
(SOT364-1)
SOT364-1SSOP-TSSOP-VSO-WAVE
SOT364-1_518Discontinued / End-of-lifeALVT1682374ALVT16823DGGY
( 9352 610 19518 )

停产信息

型号可订购的器件编号,(订购码(12NC))最后一次购买日期最后一次交货日期替代产品状态备注
74ALVT16823DGG935261019518
74ALVT16823DGG9352610195122021-12-312022-06-3074ALVT16823DGG
    74ALVT16823DGG935261019112

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVT16823DGG74ALVT16823DGG,11874ALVT16823DGGweek 2, 2006

    下表中的版本已停产。参见表 停产信息 了解更多信息。

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74ALVT16823DGG74ALVT16823DGGY74ALVT16823DGGAlways Pb-free
    品质及可靠性免责声明

    文档 (6)

    文件名称标题类型日期
    74ALVT1682318-bit bus-interface D-type flip-flop with reset and enable; 3-stateData sheet2020-10-20
    alvt16823alvt16823 IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    alvt16alvt16 Spice modelSPICE model2013-05-06
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT364-1plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm bodyPackage information2022-06-23

    支持

    如果您需要设计/技术支持,请告知我们并填写 应答表, 我们会尽快回复您。

    模型

    文件名称标题类型日期
    alvt16823alvt16823 IBIS modelIBIS model2013-04-07
    alvt16alvt16 Spice modelSPICE model2013-05-06

    订购、定价与供货

    样品

    安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品: https://extranet.nexperia.com.

    样品订单通常需要2-4天寄送时间。

    如果您尚未取得安世半导体的直接采购帐号,我们的全球与区域经销网络可以协助您取得样品

    NG体育娱乐,ng体育平台