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74CBTLV3125-Q100

4-bit bus switch

The 74CBTLV3125-Q100 provides a 4-bit high-speed bus switch with separate output enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is HIGH.

To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver.

Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Supply voltage range from 2.3 V to 3.6 V

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • 5 Ω switch connection between two ports

  • Rail to rail switching on data I/O ports

  • CMOS low power consumption

  • Latch-up performance exceeds 250 mA per JESD78B Class I level A

  • IOFF circuitry provides partial Power-down mode operation

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC (V)RON (Ω)Logic switching levelstpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74CBTLV3125BQ-Q100Production2.3 - 3.67CMOS/LVTTL0.2very low-40~12510721.375DHVQFN14
74CBTLV3125PW-Q100Production2.3 - 3.67CMOS/LVTTL0.2very low-40~1251418.068TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74CBTLV3125BQ-Q100
DHVQFN14
(SOT762-1) 		SOT762-1SOT762-1_115ActiveV312574CBTLV3125BQ-Q10X
( 9356 909 57115 )
74CBTLV3125PW-Q100
TSSOP14
(SOT402-1) 		SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118ActiveTLV312574CBTLV3125PW-Q10J
( 9353 372 58118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74CBTLV3125BQ-Q10074CBTLV3125BQ-Q10X74CBTLV3125BQ-Q100
74CBTLV3125PW-Q10074CBTLV3125PW-Q10J74CBTLV3125PW-Q100week 25, 2019
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74CBTLV3125_Q1004-bit bus switchData sheet2024-04-11
cbtlv312574CBTLV3125 IBIS modelIBIS model2015-02-22
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT762-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm bodyPackage information2023-04-05
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07

支持

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模型

文件名称标题类型日期
cbtlv312574CBTLV3125 IBIS modelIBIS model2015-02-22

订购、定价与供货

样品

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