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74LV132-Q100

Quad 2-input NAND Schmitt trigger

The 74LV132-Q100 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132-Q100 and 74HCT132-Q100.

The 74LV132-Q100 contains four 2-input NAND gates which accept standard input signals. These gates are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide operating voltage: 1.0 V to 5.5 V

  • Optimized for low voltage applications: 1.0 V to 3.6 V

  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

  • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

目标应用

  • Wave and pulse shapers for highly noisy environments

  • Astable multivibrators

  • Monostable multivibrators

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LV132BQ-Q100Production1.0 - 5.5TTL± 1210304low-40~1259411.261DHVQFN14
74LV132D-Q100Production1.0 - 5.5TTL± 1210304low-40~125929.850SO14
74LV132PW-Q100Production1.0 - 5.5TTL± 1210304low-40~1251304.355.6TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LV132BQ-Q100
DHVQFN14
(SOT762-1) 		SOT762-1SOT762-1_115ActiveLV13274LV132BQ-Q100X
( 9353 010 33115 )
74LV132D-Q100
SO14
(SOT108-1) 		SOT108-1SO-SOJ-REFLOW
SO-SOJ-WAVE
SOT108-1_118Active74LV132D74LV132D-Q100J
( 9353 010 31118 )
74LV132PW-Q100
TSSOP14
(SOT402-1) 		SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118ActiveLV13274LV132PW-Q100J
( 9353 010 32118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LV132BQ-Q10074LV132BQ-Q100X74LV132BQ-Q100Always Pb-free
74LV132D-Q10074LV132D-Q100J74LV132D-Q100Always Pb-free
74LV132PW-Q10074LV132PW-Q100J74LV132PW-Q100Always Pb-free
品质及可靠性免责声明

文档 (10)

文件名称标题类型日期
74LV132_Q100Quad 2-input NAND Schmitt triggerData sheet2024-01-30
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
lvlv Spice modelSPICE model2013-05-06
SOT762-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm bodyPackage information2023-04-05
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07
SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
SOT108-1plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm bodyPackage information2023-11-07

支持

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模型

文件名称标题类型日期
lvlv Spice modelSPICE model2013-05-06

样品

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