NG体育娱乐，ng体育平台

×

74LVC1G123-Q100

Single retriggerable monostable multivibrator; Schmitt trigger inputs

The 74LVC1G123-Q100 is a single retriggerable monostable multivibrator with Schmitt trigger inputs. Output pulse width is controlled by three methods:

  1. The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT).

  2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (A) or the active HIGH-going edge input (B). By repeating this process, the output pulse period (Q = HIGH) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input CLR, which also inhibits the triggering.

  3. An internal connection from CLR to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input CLR.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. Schmitt trigger inputs, makes the circuit highly tolerant to slower input rise and fall times.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.65 V to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power consumption

  • DC triggered from active HIGH or active LOW inputs

  • Retriggerable for very long pulses up to 100 % duty factor

  • Direct reset terminates output pulse

  • Schmitt trigger on all inputs

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8-B/JESD36 (2.7 V to 3.6 V)

  • Power-on-reset on outputs

  • Latch-up performance exceeds 100 mA

  • Direct interface with TTL levels

  • Inputs accept voltages up to 5.5 V

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G123DC-Q100Production1.65 - 5.5CMOS/LVTTL± 323.5low-40~12520334.0113VSSOP8
74LVC1G123DP-Q100Production1.65 - 5.5CMOS/LVTTL± 323.5low-40~12521419.8105TSSOP8

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC1G123DC-Q100
VSSOP8
(SOT765-1) 		SOT765-1SOT765-1_125ActiveY374LVC1G123DC-Q100H
( 9353 021 06125 )
74LVC1G123DP-Q100
TSSOP8
(SOT505-2) 		SOT505-2SOT505-2_125ActiveY374LVC1G123DP-Q100H
( 9353 021 07125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC1G123DC-Q10074LVC1G123DC-Q100H74LVC1G123DC-Q100Always Pb-free
74LVC1G123DP-Q10074LVC1G123DP-Q100H74LVC1G123DP-Q100Always Pb-free
品质及可靠性免责声明

文档 (5)

文件名称标题类型日期
74LVC1G123_Q100Single retriggerable monostable multivibrator; Schmitt trigger inputsData sheet2023-08-14
lvc1g12374LVC1G123 IBIS modelIBIS model2015-04-02
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT505-2plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm bodyPackage information2022-06-03
SOT765-1plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm bodyPackage information2022-06-03

支持

如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

模型

文件名称标题类型日期
lvc1g12374LVC1G123 IBIS modelIBIS model2015-04-02

订购、定价与供货

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品： https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号，我们的全球与区域经销网络可以协助您取得样品

NG体育娱乐，ng体育平台