特性
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Wide supply voltage range from 2.0 V to 5.5 V
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Maximum tpd of 9 ns at 5 V
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Typical VOL(p)< 0.8 V at VCC = 3.3 V, Tamb = 25 °C
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Typical VOH(v)> 2.3 V at VCC = 3.3 V, Tamb = 25 °C
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Supports mixed-mode voltage operation on all ports
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IOFF circuitry provides partial Power-down mode operation
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Latch-up performance exceeds 250 mA per JESD 78 Class II
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ESD protection:
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HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V
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CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
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Specified from -40 °C to +85 °C and from -40 °C to +125 °C
参数类型
| Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV00APW | Production | 2.0 - 5.5 | CMOS | ± 12 | 4.3 | 45 | 4 | low | -40~125 | 140 | 7.5 | 66 | TSSOP14 |
封装
| 型号 | 封装 | 尺寸版本 | 回流焊/波峰焊 | 包装 | 状态 | 标示 | 可订购的器件编号，（订购码(12NC)） |
|---|---|---|---|---|---|---|---|
| 74LV00APW |  TSSOP14 (SOT402-1) | SOT402-1 | SSOP-TSSOP-VSO-WAVE | SOT402-1_118 | Active | 74LV00A | 74LV00APWJ ( 9356 906 46118 ) |
文档 (6)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74LV00A | Quad 2-input NAND gate | Data sheet | 2024-01-29 |
| lv00a | 74LV00A IBIS model | IBIS model | 2019-01-08 |
| Nexperia_document_leaflet_Logic_LV-AT_201903 | LV-A(T) logic family | Leaflet | 2019-03-19 |
| Nexperia_Selection_guide_2023 | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
订购、定价与供货
样品
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