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74LVT573

3.3 V octal D-type transparent latch; 3-state

The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

特性

  • Wide supply voltage range from 2.7 to 3.6 V

  • Inputs and outputs arranged for easy interfacing to microprocessors

  • 3-state outputs for bus interfacing

  • Common output enable control

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Direct interface with TTL levels

  • Input and output interface capability to systems at 5 V supply

  • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

  • Live insertion and extraction permitted

  • No bus current loading when output is tied to 5 V bus

  • Power-up reset

  • Power-up 3-state

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM JESD22-A114E exceeds 2000 V

    • MM JESD22-A115-A exceeds 200 V

  • Specified from -40 °C to +85 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVT573BQProduction2.7 - 3.6TTL-32/+642.7medium-40~85778.649DHVQFN20
74LVT573DProduction2.7 - 3.6TTL-32/+642.7medium-40~858426.860SO20
74LVT573PWProduction2.7 - 3.6TTL-32/+642.7medium-40~851004.544TSSOP20

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号,(订购码(12NC))
74LVT573BQ
DHVQFN20
(SOT764-1)
SOT764-1SOT764-1_115ActiveLVT573BQ74LVT573BQ,115
( 9352 856 07115 )
74LVT573D
SO20
(SOT163-1)
SOT163-1WAVE_BG-BD-1
SOT163-1_118Active74LVT573D74LVT573D,118
( 9351 707 00118 )
74LVT573PW
TSSOP20
(SOT360-1)
SOT360-1SSOP-TSSOP-VSO-WAVE
SOT360-1_118ActiveLVT57374LVT573PW,118
( 9351 763 60118 )

停产信息

型号可订购的器件编号,(订购码(12NC))最后一次购买日期最后一次交货日期替代产品状态备注
74LVT573D9351707001122021-12-312022-06-3074LVT573D
    74LVT573PW9351763601122021-12-312022-06-3074LVT573PW

      环境信息

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74LVT573BQ74LVT573BQ,11574LVT573BQAlways Pb-free
      74LVT573D74LVT573D,11874LVT573Dweek 4, 2004
      74LVT573PW74LVT573PW,11874LVT573PWweek 7, 2005
      品质及可靠性免责声明

      文档 (9)

      文件名称标题类型日期
      74LVT5733.3 V octal D-type transparent latch; 3-stateData sheet2021-07-30
      lvt573lvt573 IBIS modelIBIS model2013-04-07
      Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
      lvtlvt Spice modelSPICE model2013-05-06
      SOT764-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm bodyPackage information2022-06-21
      SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
      SOT360-1plastic, thin shrink small outline package; 20 leads; 0.65 mm pitch; 6.5 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-21
      SOT163-1plastic, small outline package; 20 leads; 1.27 mm pitch; 12.8 mm x 7.5 mm x 2.65 mm bodyPackage information2022-06-20
      WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08

      支持

      如果您需要设计/技术支持,请告知我们并填写 应答表, 我们会尽快回复您。

      模型

      文件名称标题类型日期
      lvt573lvt573 IBIS modelIBIS model2013-04-07
      lvtlvt Spice modelSPICE model2013-05-06

      订购、定价与供货

      样品

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