特性
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Direct interface with TTL levels
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Supply voltage range from 4.5 V to 5.5 V
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Typical tPZL of 3.5 ns at 5 V
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Typical VOL(p)< 0.8 V at VCC = 5 V, Tamb = 25 °C
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Supports mixed-mode voltage operation on all ports
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IOFF circuitry provides partial Power-down mode operation
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Latch-up performance exceeds 250 mA per JESD 78 Class II
- ESD protection:
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HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 3000 V
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CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 2000 V
-
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Specified from -40 °C to +85 °C and from -40 °C to +125 °C
参数类型
Type number | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|
74LV07ATPW | Production | 4.5 - 5.5 | TTL | ± 12 | 60 | 6 | low | -40~125 | 143 | 69 | TSSOP14 |
封装
型号 | 封装 | 尺寸版本 | 回流焊/波峰焊 | 包装 | 状态 | 标示 | 可订购的器件编号,(订购码(12NC)) |
---|---|---|---|---|---|---|---|
74LV07ATPW | TSSOP14 (SOT402-1) | SOT402-1 | SSOP-TSSOP-VSO-WAVE | SOT402-1_118 | Active | LV07AT | 74LV07ATPWJ ( 9353 082 09118 ) |
文档 (5)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LV07AT | Hex buffer with open-drain outputs | Data sheet | 2024-04-08 |
lv07at | lv07at IBIS model | IBIS model | 2017-06-02 |
Nexperia_document_leaflet_Logic_LV-AT_201903 | LV-A(T) logic family | Leaflet | 2019-03-19 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
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