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74LVC00A-Q100

Quad 2-input NAND gate

The 74LVC00A-Q100 is a quad 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Overvoltage tolerant inputs to 5.5 V

  • Wide supply voltage range from 1.2 V to 3.6 V

  • CMOS low-power consumption

  • Direct interface with TTL levels

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC00ABQ-Q100Production1.2 - 3.6CMOS/LVTTL± 242.11504low-40~12510923.477DHVQFN14
74LVC00AD-Q100Production1.2 - 3.6CMOS/LVTTL± 242.11504low-40~12511222.670SO14
74LVC00APW-Q100Production1.2 - 3.6CMOS/LVTTL± 242.11504low-40~1251448.770TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC00ABQ-Q100
DHVQFN14
(SOT762-1) 		SOT762-1SOT762-1_115ActiveVC00A74LVC00ABQ-Q100X
( 9353 003 52115 )
74LVC00AD-Q100
SO14
(SOT108-1) 		SOT108-1SO-SOJ-REFLOW
SO-SOJ-WAVE
SOT108-1_118Active74LVC00AD74LVC00AD-Q100J
( 9353 003 53118 )
74LVC00APW-Q100
TSSOP14
(SOT402-1) 		SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118ActiveLVC00A74LVC00APW-Q100J
( 9353 003 54118 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74LVC00APW-Q100/AU9356906591182018-12-312019-06-3074LVC00APW-Q100

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74LVC00ABQ-Q10074LVC00ABQ-Q100X74LVC00ABQ-Q100Always Pb-free
    74LVC00AD-Q10074LVC00AD-Q100J74LVC00AD-Q100Always Pb-free
    74LVC00APW-Q10074LVC00APW-Q100J74LVC00APW-Q100Always Pb-free
    品质及可靠性免责声明

    文档 (12)

    文件名称标题类型日期
    74LVC00A_Q100Quad 2-input NAND gateData sheet2024-02-08
    AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
    AN11009Pin FMEA for LVC familyApplication note2019-01-09
    lvc00alvc00a IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    SOT762-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm bodyPackage information2023-04-05
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07
    SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
    SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
    WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
    SOT108-1plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm bodyPackage information2023-11-07

    支持

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    模型

    文件名称标题类型日期
    lvc00alvc00a IBIS modelIBIS model2013-04-07

    样品

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