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Advanced Low-Voltage CMOS ALVC(H)

The advanced low voltage CMOS (ALVC) logic family is a speed upgrade of the LVC family. It contains an extensive selection of 16-bit parallel interface logic and gates for use in 3.3 V and mixed 3.3 V / 5.0 V systems.

ALVC logic devices are specified over 1.65 V to 3.6 V. With a balanced output drive of 24 mA and typical propagation delay of 4 ns, the ALVC family includes parallel interface logic, gates and translators.

Over voltage tolerant I/O, source termination resistor, bus hold and power OFF are some of the advanced features of these devices making them ideal for parallel interface applications.

ALVC products are available in SO, TSSOP and innovative leadless DQFN packages for PCB space saving. Nexperia's ALVC products are fully specified from -40°C to 85°C.

主要特性和优势

  • 2 ns typical propagation delay
  • Output drive capability IOH / IOL = ±24 mA
  • Low power
  • 3.6 volt-tolerant I/O
  • Live insertion/extraction permitted
  • Optional: Buffers and drivers with 30 Ω integrated series termination
  • Optional: Bus-Hold on data inputs
  • Bus interface functions available in 16-bit and 32-bit versions

关键应用

  • STB, DVD, HDTV
  • Workstations
  • Telecom and networking equipment
  • Advanced bus interfaces
  • Computer peripherals

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Advanced Low-Voltage CMOS ALVC(H)
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Products

Analog & Logic ICs

型号 描述 状态 快速访问
74ALVC00BQ Quad 2-input NAND gate Production
74ALVC00D Quad 2-input NAND gate Production
74ALVC00PW Quad 2-input NAND gate Production
74ALVC00BQ-Q100 Quad 2-input NAND gate Production
74ALVC00D-Q100 Quad 2-input NAND gate Production
74ALVC00PW-Q100 Quad 2-input NAND gate Production
74ALVC02BQ Quad 2-input NOR gate Production
74ALVC02D Quad 2-input NOR gate Production
74ALVC02PW Quad 2-input NOR gate Production
74ALVC04BQ Hex inverter Production
74ALVC04D Hex inverter Production
74ALVC04PW Hex inverter Production
74ALVC08BQ Quad 2-input AND gate Production
74ALVC08D Quad 2-input AND gate Production
74ALVC08PW Quad 2-input AND gate Production
74ALVC125BQ Quad buffer/line driver; 3-state Production
74ALVC125D Quad buffer/line driver; 3-state Production
74ALVC125PW Quad buffer/line driver; 3-state Production
74ALVC125BQ-Q100 Quad buffer/line driver; 3-state Production
74ALVC125D-Q100 Quad buffer/line driver; 3-state Production
74ALVC125PW-Q100 Quad buffer/line driver; 3-state Production
74ALVC14BQ Hex inverting Schmitt trigger Production
74ALVC14D Hex inverting Schmitt trigger Production
74ALVC14PW Hex inverting Schmitt trigger Production
74ALVC16244DGG 2.5 V / 3.3 V 16-bit buffer/line driver; 3-state Production
74ALVCH16244DGG 2.5 V / 3.3 V 16-bit buffer/line driver; 3-state Production
74ALVC16245DGG 16-bit transceiver with direction pin; 3-state Production
74ALVCH16245DGG 16-bit transceiver with direction pin; 3-state Production
74ALVC164245DGG-Q100 16-bit dual supply translating transceiver; 3-state Production
74ALVC244BQ Octal buffer/line driver; 3-state Production
74ALVC244D Octal buffer/line driver; 3-state Production
74ALVC244PW Octal buffer/line driver; 3-state Production
74ALVC245BQ Octal bus transceiver; 3-state Production
74ALVC245D Octal bus transceiver; 3-state Production
74ALVC245PW Octal bus transceiver; 3-state Production
74ALVC32BQ Quad 2-input OR gate Production
74ALVC32D Quad 2-input OR gate Production
74ALVC32PW Quad 2-input OR gate Production
74ALVC32BQ-Q100 Quad 2-input OR gate Production
74ALVC32D-Q100 Quad 2-input OR gate Production
74ALVC32PW-Q100 Quad 2-input OR gate Production
74ALVC373BQ Octal D-type transparent latch; 3-state Production
74ALVC373D Octal D-type transparent latch; 3-state Production
74ALVC373PW Octal D-type transparent latch; 3-state Production
74ALVC374BQ Octal D-type flip-flop; positive-edge trigger; 3-state Production
74ALVC374D Octal D-type flip-flop; positive-edge trigger; 3-state Production
74ALVC374PW Octal D-type flip-flop; positive-edge trigger; 3-state Production
74ALVC541BQ Octal buffer/line driver; 3-state Production
74ALVC541D Octal buffer/line driver; 3-state Production
74ALVC541PW Octal buffer/line driver; 3-state Production
74ALVC541BQ-Q100 Octal buffer/line driver; 3-state Production
74ALVC541D-Q100 Octal buffer/line driver; 3-state Production
74ALVC541PW-Q100 Octal buffer/line driver; 3-state Production
74ALVC573BQ Octal D-type transparent latch; 3-state Production
74ALVC573D Octal D-type transparent latch; 3-state Production
74ALVC573PW Octal D-type transparent latch; 3-state Production
74ALVC574BQ Octal D-type flip-flop; positive edge-trigger; 3-state Production
74ALVC574D Octal D-type flip-flop; positive edge-trigger; 3-state Production
74ALVC574PW Octal D-type flip-flop; positive edge-trigger; 3-state Production
74ALVC74BQ Dual D-type flip-flop with set and reset; positive-edge trigger Production
74ALVC74D Dual D-type flip-flop with set and reset; positive-edge trigger Production
74ALVC74PW Dual D-type flip-flop with set and reset; positive-edge trigger Production
74ALVC74PW-Q100 Dual D-type flip-flop with set and reset; positive-edge trigger Production
74ALVCH162244DGG 16-bit buffer/line driver with 30 Ohm termination resistor; 3-state Production
74ALVCH162245DGG 16-bit bus transceiver with direction pin and 30 Ohm termination resistor; 3-state Production
74ALVCH162601DGG 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state Production
74ALVCH162827DGG 20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state Production
74ALVCH16373DGG 2.5 V/3.3 V 16-bit D-type transparent latch; 3-state Production
74ALVCH16374DGG 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state Production
74ALVCH16500DGG 18-bit universal bus transceiver; 3-state Production
74ALVCH16501DGG 18-bit universal bus transceiver; 3-state Production
74ALVCH16543DGG 16-bit D-type registered transceiver; 3-state Production
74ALVCH16600DGG 18-bit universal bus transceiver; 3-state Production
74ALVCH16601DGG 18-bit universal bus transceiver; 3-state Production
74ALVCH16646DGG 16-bit bus transceiver/register; 3-state Production
74ALVCH16652DGG 16-bit transceiver/register with dual enable; 3-state Production
74ALVCH16821DGG 20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state Production
74ALVCH16823DGG 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Production
74ALVCH16825DGG 18-bit buffer/driver; 3-state Production
74ALVCH16827DGG 20-bit buffer/line driver, non-inverting; 3-state Production
74ALVCH16841DGG 20-bit bus interface D-type latch; 3-state Production
74ALVCH16843DGG 18-bit bus-interface D-type latch; 3-state Production
74ALVCH16952DGG 16-bit registered transceiver; 3-state Production

Automotive qualified products (AEC-Q100/Q101)

型号 描述 状态 快速访问
74ALVC00BQ-Q100 Quad 2-input NAND gate Production
74ALVC00D-Q100 Quad 2-input NAND gate Production
74ALVC00PW-Q100 Quad 2-input NAND gate Production
74ALVC125BQ-Q100 Quad buffer/line driver; 3-state Production
74ALVC125D-Q100 Quad buffer/line driver; 3-state Production
74ALVC125PW-Q100 Quad buffer/line driver; 3-state Production
74ALVC164245DGG-Q100 16-bit dual supply translating transceiver; 3-state Production
74ALVC32BQ-Q100 Quad 2-input OR gate Production
74ALVC32D-Q100 Quad 2-input OR gate Production
74ALVC32PW-Q100 Quad 2-input OR gate Production
74ALVC541BQ-Q100 Octal buffer/line driver; 3-state Production
74ALVC541D-Q100 Octal buffer/line driver; 3-state Production
74ALVC541PW-Q100 Octal buffer/line driver; 3-state Production
74ALVC74PW-Q100 Dual D-type flip-flop with set and reset; positive-edge trigger Production

Documentation

文件名称 标题 类型 日期
TSSOP14_SOT402-1_mk plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10

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Datasheets (43)

文件名称 标题 类型 日期
74ALVC00 Quad 2-input NAND gate Data sheet 2024-01-11
74ALVC00_Q100 Quad 2-input NAND gate Data sheet 2024-01-11
74ALVC02 Quad 2-input NOR gate Data sheet 2024-01-11
74ALVC04 Hex inverter Data sheet 2024-01-12
74ALVC08 Quad 2-input AND gate Data sheet 2024-01-12
74ALVC125 Quad buffer/line driver; 3-state Data sheet 2024-01-12
74ALVC125_Q100 Quad buffer/line driver; 3-state Data sheet 2024-01-12
74ALVC14 Hex inverting Schmitt trigger Data sheet 2024-01-12
74ALVC_ALVCH16244 2.5 V / 3.3 V 16-bit buffer/line driver; 3-state Data sheet 2021-07-22
74ALVC_ALVCH16245 16-bit transceiver with direction pin; 3-state Data sheet 2021-08-05
74ALVC164245_Q100 16-bit dual supply translating transceiver; 3-state Data sheet 2024-04-24
74ALVC244 Octal buffer/line driver; 3-state Data sheet 2023-07-10
74ALVC245 Octal bus transceiver; 3-state Data sheet 2023-07-11
74ALVC32 Quad 2-input OR gate Data sheet 2024-01-12
74ALVC32_Q100 Quad 2-input OR gate Data sheet 2024-01-12
74ALVC373 Octal D-type transparent latch; 3-state Data sheet 2023-07-10
74ALVC374 Octal D-type flip-flop; positive-edge trigger; 3-state Data sheet 2023-07-10
74ALVC541 Octal buffer/line driver; 3-state Data sheet 2023-07-11
74ALVC541_Q100 Octal buffer/line driver; 3-state Data sheet 2023-07-11
74ALVC573 Octal D-type transparent latch; 3-state Data sheet 2023-07-11
74ALVC574 Octal D-type flip-flop; positive edge-trigger; 3-state Data sheet 2023-07-11
74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Data sheet 2024-02-05
74ALVC74_Q100 Dual D-type flip-flop with set and reset; positive-edge trigger Data sheet 2024-02-05
74ALVCH162244 16-bit buffer/line driver with 30 Ohm termination resistor; 3-state Data sheet 2024-03-03
74ALVCH162245 16-bit bus transceiver with direction pin and 30 Ohm termination resistor; 3-state Data sheet 2024-03-03
74ALVCH162601 18-bit universal bus transceiver with 30 Ohm termination resistor; 3-state Data sheet 2024-03-03
74ALVCH162827 20-bit buffer/line driver; non-inverting; with 30 Ohm termination resistors; 3-state Data sheet 2018-01-19
74ALVCH16373 2.5 V/3.3 V 16-bit D-type transparent latch; 3-state Data sheet 2021-11-22
74ALVCH16374 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state Data sheet 2021-11-23
74ALVCH16500 18-bit universal bus transceiver; 3-state Data sheet 2017-12-11
74ALVCH16501 18-bit universal bus transceiver; 3-state Data sheet 2021-11-24
74ALVCH16543 16-bit D-type registered transceiver; 3-state Data sheet 2017-12-15
74ALVCH16600 18-bit universal bus transceiver; 3-state Data sheet 2018-01-15
74ALVCH16601 18-bit universal bus transceiver; 3-state Data sheet 2018-08-14
74ALVCH16646 16-bit bus transceiver/register; 3-state Data sheet 2018-09-11
74ALVCH16652 16-bit transceiver/register with dual enable; 3-state Data sheet 2018-09-12
74ALVCH16821 20-bit bus-interface D-type flip-flop; positive-edge trigger; 3-state Data sheet 2018-02-02
74ALVCH16823 18-bit bus-interface D-type flip-flop with reset and enable; 3-state Data sheet 2018-02-02
74ALVCH16825 18-bit buffer/driver; 3-state Data sheet 2018-04-06
74ALVCH16827 20-bit buffer/line driver, non-inverting; 3-state Data sheet 2018-04-06
74ALVCH16841 20-bit bus interface D-type latch; 3-state Data sheet 2018-09-12
74ALVCH16843 18-bit bus-interface D-type latch; 3-state Data sheet 2017-11-21
74ALVCH16952 16-bit registered transceiver; 3-state Data sheet 2018-01-09
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