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    74LVC2G34GW-Q100

    Dual buffer gate

    The 74LVC2G34-Q100 is a dual buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

    Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

    This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

    This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

    Features and benefits

    • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

      • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • IOFF provides partial Power-down mode operation

    • Direct interface with TTL levels

    • Latch-up performance exceeds 250 mA

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    参数类型

    型号 Product status VCC (V) Logic switching levels Output drive capability (mA) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
    74LVC2G34GW-Q100 Production 1.65 - 5.5 CMOS/LVTTL ± 32 175 2 low -40~125 264 38.4 153 TSSOP6

    PCB Symbol, Footprint and 3D Model

    Model Name 描述

    封装

    型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
    74LVC2G34GW-Q100 74LVC2G34GW-Q100,1
    (935299052125)    		 Active YA SOT363-2
    TSSOP6
    (SOT363-2)     		SOT363-2 SOT363-2_125

    环境信息

    型号 可订购的器件编号 化学成分 RoHS RHF指示符
    74LVC2G34GW-Q100 74LVC2G34GW-Q100,1 74LVC2G34GW-Q100 rohs rhf rhf
    品质及可靠性免责声明

    文档 (7)

    文件名称 标题 类型 日期
    74LVC2G34_Q100 Dual buffer gate Data sheet 2023-08-22
    AN11009 Pin FMEA for LVC family Application note 2019-01-09
    SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02
    lvc2g34 74LVC2G34 IBIS model IBIS model 2015-09-06
    SOT363-2 plastic thin shrink small outline package; 6 leads; body width 1.25 mm Package information 2022-11-21
    SOT363-2_125 TSSOP6 ; Reel pack for SMD, 7"; Q3/T4 product orientation Packing information 2022-11-04
    74LVC2G34GW-Q100_Nexperia_Product_Reliability 74LVC2G34GW-Q100 Nexperia Product Reliability Quality document 2023-05-29

    支持

    如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

    模型

    文件名称 标题 类型 日期
    lvc2g34 74LVC2G34 IBIS model IBIS model 2015-09-06
    SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02

    PCB Symbol, Footprint and 3D Model

    Model Name 描述

    订购、定价与供货

    型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
    74LVC2G34GW-Q100 74LVC2G34GW-Q100,1 935299052125 Active SOT363-2_125 3,000 订单产品

    样品

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    如果您没有 Nexperia 的直接账户，我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方经销商列表。

    How does it work?

    The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

    可订购部件

    型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
    74LVC2G34GW-Q100 74LVC2G34GW-Q100,1 935299052125 SOT363-2 订单产品
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