可订购部件
| 型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
|---|---|---|---|---|
| 74LVC377D | 74LVC377D,118 | 935210660118 | SOT163-1 | 订单产品 |
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Click here for more information74LVC377D
Octal D-type flip-flop with data enable; positive-edge trigger
The 74LVC377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Overvoltage tolerant inputs to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Output drive capability 50 Ω transmission lines at 125 °C
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
参数类型
| 型号 | Product status | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC377D | Production | 1.2 - 3.6 | CMOS/LVTTL | ± 24 | 6.0 | 230 | low | -40~125 | 85 | 27.7 | 61 | SO20 |
PCB Symbol, Footprint and 3D Model
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封装
| 型号 | 可订购的器件编号，（订购码(12NC)） | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
|---|---|---|---|---|---|---|---|
| 74LVC377D | 74LVC377D,118 (935210660118) |
Active | 74LVC377D |
SO20 (SOT163-1) |
SOT163-1 |
WAVE_BG-BD-1
|
SOT163-1_118 |
文档 (11)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74LVC377 | Octal D-type flip-flop with data enable; positive-edge trigger | Data sheet | 2023-08-28 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
| SOT163-1 | 3D model for products with SOT163-1 package | Design support | 2020-01-22 |
| lvc377 | lvc377 IBIS model | IBIS model | 2013-04-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT163-1 | plastic, small outline package; 20 leads; 1.27 mm pitch; 12.8 mm x 7.5 mm x 2.65 mm body | Package information | 2022-06-20 |
| SOT163-1_118 | SO20; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2022-08-01 |
| 74LVC377D_Nexperia_Product_Reliability | 74LVC377D Nexperia Product Reliability | Quality document | 2023-05-29 |
| lvc | lvc Spice model | SPICE model | 2013-05-07 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
订购、定价与供货
| 型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
|---|---|---|---|---|---|---|
| 74LVC377D | 74LVC377D,118 | 935210660118 | Active | SOT163-1_118 | 2,000 | 订单产品 |
样品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LVC377D
Octal D-type flip-flop with data enable; positive-edge trigger
从安世半导体购买
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