NG体育娱乐，ng体育平台

×

74LVC1G18-Q100

1-of-2 non-inverting demultiplexer with 3-state deselected output

The 74LVC1G18-Q100 is a 1-to-2 demultiplexer with 3-state outputs. The device buffers the data on input A and passes it to output 1Y or 2Y, depending on whether the state of the select input (S) is LOW or HIGH. The unused output assumes the high impedence OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • Latch-up performance exceeds 250 mA

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC1G18GV-Q100Production1.65 - 5.5CMOS/LVTTL± 322.3low-40~12523139.1145TSOP6
74LVC1G18GW-Q100Production1.65 - 5.5CMOS/LVTTL± 322.3low-40~12526438.4153TSSOP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC1G18GV-Q100
TSOP6
(SOT457) 		SOT457REFLOW_BG-BD-1
WAVE_BG-BD-1
SOT457_125ActiveV1874LVC1G18GV-Q100H
( 9353 015 08125 )
74LVC1G18GW-Q100
TSSOP6
(SOT363-2) 		SOT363-2SOT363-2_125ActiveVW74LVC1G18GW-Q100H
( 9353 015 09125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC1G18GV-Q10074LVC1G18GV-Q100H74LVC1G18GV-Q100Always Pb-free
74LVC1G18GW-Q10074LVC1G18GW-Q100H74LVC1G18GW-Q100Always Pb-free
品质及可靠性免责声明

文档 (10)

文件名称标题类型日期
74LVC1G18_Q1001-of-2 non-inverting demultiplexer with 3-state deselected outputData sheet2023-08-16
AN10161PicoGate Logic footprintsApplication note2002-10-29
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvc1g1874LVC1G18 IBIS modelIBIS model2014-10-20
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT363-2plastic thin shrink small outline package; 6 leads; body width 1.25 mmPackage information2022-11-21
MAR_SOT457MAR_SOT457 TopmarkTop marking2013-06-03
WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
SOT457plastic, surface-mounted package (SC-74; TSOP6); 6 leadsPackage information2023-03-03
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06

支持

如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

模型

文件名称标题类型日期
lvc1g1874LVC1G18 IBIS modelIBIS model2014-10-20

订购、定价与供货

样品

安世半导体客户可通过我们的销售机构或直接通过在线样品商店订购样品： https://extranet.nexperia.com.

样品订单通常需要2-4天寄送时间。

如果您尚未取得安世半导体的直接采购帐号，我们的全球与区域经销网络可以协助您取得样品

NG体育娱乐，ng体育平台