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    74AVC1T1004

    1-to-4 fan-out buffer

    The 74AVC1T1004 is a translating 1-to-4 fan-out buffer suitable for use in clock distribution. It has dual supplies (VCC(A) and VCC(B)) for voltage translation. It also has a data input (A), four data outputs (Yn) and an output enable input (OE). VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V. It makes the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. The levels of A and OE are referenced to VCC(A), outputs Yn are referenced to VCC(B). This supply configuration ensures that the fanned out signals can be used in level shifting. A HIGH on OE causes all outputs to be pulled LOW via pull-down resistors, a LOW on OE disconnects the pull-down resistors and enables all outputs.

    Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

    The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down.

    特性

    • Wide supply voltage range:

      • VCC(A): 0.8 V to 3.6 V

      • VCC(B): 0.8 V to 3.6 V

    • Complies with JEDEC standards:

      • JESD8-12 (0.8 V to 1.3 V)

      • JESD8-11 (0.9 V to 1.65 V)

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8-B (2.7 V to 3.6 V)

    • ESD protection:

      • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV

      • CDM JESD22-C101 exceeds 1 kV

    • Maximum data rates:

      • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

      • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

      • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

      • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

    • Latch-up performance exceeds 100 mA per JESD 78 Class II

    • Inputs accept voltages up to 3.6 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    参数类型

    Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
    74AVC1T1004DPProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 124.91very low-40~12518823.996.8TSSOP10

    封装

    型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
    74AVC1T1004DP
    TSSOP10
    (SOT552-1)     		SOT552-1SSOP-TSSOP-VSO-WAVE
    		SOT552-1_118ActiveBc74AVC1T1004DPJ
    ( 9356 901 22118 )

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74AVC1T1004DP74AVC1T1004DPJ74AVC1T1004DPweek 25, 2019
    品质及可靠性免责声明

    文档 (5)

    文件名称标题类型日期
    74AVC1T10041-to-4 fan-out bufferData sheet2021-03-01
    avc1t100474AVC1T1004 IBIS modelIBIS model2018-06-18
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT552-1plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm bodyPackage information2022-06-07

    支持

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    模型

    文件名称标题类型日期
    avc1t100474AVC1T1004 IBIS modelIBIS model2018-06-18

    订购、定价与供货

    样品

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