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74AVCH8T245

8-bit dual supply translating transceiver with configurable voltage translation; 3-state

The 74AVCH8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), a output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active.

The 74AVCH8T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

特性

  • Wide supply voltage range:

    • VCC(A): 0.8 V to 3.6 V

    • VCC(B): 0.8 V to 3.6 V

  • Maximum data rates:

    • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

    • 260 Mbit/s (≥ 1.1 V to 3.3 V translation)

    • 260 Mbit/s (≥ 1.1 V to 2.5 V translation)

    • 210 Mbit/s (≥ 1.1 V to 1.8 V translation)

    • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

    • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

  • Suspend mode

  • Bus hold on data inputs

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • ESD protection:

    • HBM JESD22-A114E Class 3B exceeds 8000 V

    • MM JESD22-A115-A exceeds 200 V

    • CDM JESD22-C101C exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVCH8T245BQProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.18very low-40~125676.241DHVQFN24
74AVCH8T245PWProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.18very low-40~125812.336TSSOP24

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74AVCH8T245BQ
DHVQFN24
(SOT815-1) 		SOT815-1SOT815-1_118ActiveVCH8T24574AVCH8T245BQ,118
( 9352 845 92118 )
74AVCH8T245PW
TSSOP24
(SOT355-1) 		SOT355-1SSOP-TSSOP-VSO-WAVE
SOT355-1_118ActiveAVCH8T24574AVCH8T245PW:118
( 9352 845 94118 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74AVCH8T245BQ935284592115
74AVCH8T245PW9352845941122021-12-312022-06-3074AVCH8T245PW

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74AVCH8T245BQ74AVCH8T245BQ,11874AVCH8T245BQAlways Pb-free
    74AVCH8T245PW74AVCH8T245PW:11874AVCH8T245PWAlways Pb-free
    品质及可靠性免责声明

    文档 (7)

    文件名称标题类型日期
    74AVCH8T2458-bit dual supply translating transceiver with configurable voltage translation; 3-stateData sheet2017-05-03
    Nexperia_document_guide_Logic_translatorsNexperia Logic TranslatorsBrochure2021-04-12
    avch8t24574AVCH8T245 IBIS modelIBIS model2019-01-09
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT355-1plastic, thin shrink small outline package; 24 leads; 0.65 mm pitch; 7.8 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-22
    SOT815-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 5.5 mm x 3.5 mm x 1 mm bodyPackage information2021-08-17

    支持

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    模型

    文件名称标题类型日期
    avch8t24574AVCH8T245 IBIS modelIBIS model2019-01-09

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