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74ALVC74

Dual D-type flip-flop with set and reset; positive-edge trigger

The 74ALVC74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range from 1.65 V to 3.6 V

  • CMOS low power dissipation

  • Overvoltage tolerant inputs to 3.6 V

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA per JESD78 Class II.A

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 to 1.95 V)

    • JESD8-5 (2.3 to 2.7 V)

    • JESD8C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74ALVC74BQProduction1.65 - 3.6TTL± 242.3425low-40~8510318.371DHVQFN14
74ALVC74DProduction1.65 - 3.6TTL± 242.3425low-40~8510317.162SO14
74ALVC74PWProduction1.65 - 3.6TTL± 242.3425low-40~851386.965TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVC74BQ
DHVQFN14
(SOT762-1) 		SOT762-1SOT762-1_115ActiveALV7474ALVC74BQ,115
( 9352 736 92115 )
74ALVC74D
SO14
(SOT108-1) 		SOT108-1SO-SOJ-REFLOW
SO-SOJ-WAVE
SOT108-1_118Active74ALVC74D74ALVC74D,118
( 9352 697 41118 )
74ALVC74PW
TSSOP14
(SOT402-1) 		SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118ActiveALVC7474ALVC74PW,118
( 9352 697 40118 )

下表中的版本已停产。参见表 停产信息 了解更多信息。

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74ALVC74D
SO14
(SOT108-1) 		SOT108-1SO-SOJ-REFLOW
SO-SOJ-WAVE
SOT108-1_112Withdrawn / End-of-life74ALVC74D74ALVC74D,112
( 9352 697 41112 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74ALVC74D9352697411122021-12-312022-06-3074ALVC74D
    74ALVC74PW9352697401122021-12-312022-06-3074ALVC74PW

      环境信息

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74ALVC74BQ74ALVC74BQ,11574ALVC74BQAlways Pb-free
      74ALVC74D74ALVC74D,11874ALVC74DAlways Pb-free
      74ALVC74PW74ALVC74PW,11874ALVC74PWweek 10, 2005

      下表中的版本已停产。参见表 停产信息 了解更多信息。

      型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
      74ALVC74D74ALVC74D,11274ALVC74DAlways Pb-free
      品质及可靠性免责声明

      文档 (10)

      文件名称标题类型日期
      74ALVC74Dual D-type flip-flop with set and reset; positive-edge triggerData sheet2024-02-05
      alvc74alvc74 IBIS modelIBIS model2013-04-07
      Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
      SOT762-1plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm bodyPackage information2023-04-05
      SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
      SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07
      SO-SOJ-WAVEFootprint for wave solderingWave soldering2009-10-08
      SO-SOJ-REFLOWFootprint for reflow solderingReflow soldering2009-10-08
      WAVE_BG-BD-1Wave soldering profileWave soldering2021-09-08
      SOT108-1plastic, small outline package; 14 leads; 1.27 mm pitch; 8.65 mm x 3.9 mm x 1.75 mm bodyPackage information2023-11-07

      支持

      如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

      模型

      文件名称标题类型日期
      alvc74alvc74 IBIS modelIBIS model2013-04-07

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